1. Field of the Invention
This invention generally relates to clock recovery in digital communications equipment, and more particularly to a method and system for adaptively and continuously estimating the relationship between a Moving Pictures Experts Group (xe2x80x9cMPEGxe2x80x9d) encoder time clock and an MPEG decoder time clock and adjusting the decoder time clock in accordance with the estimate.
2. Description of the Related Art
MPEG-1 and MPEG-2 are industry standards for the compression of digital audio-video programs for storage and transmission. Digital audiovisual programs are compressed or xe2x80x9cencodedxe2x80x9d for storage and transmission. To be viewed, the program must be decompressed or xe2x80x9cdecodedxe2x80x9d. Herein, the term xe2x80x9cprogramxe2x80x9d means a collection of related audio-video signals having a common time base and intended for synchronized presentation.
The MPEG standards provide for hierarchically layered data streams. That is, an audio-video program is composed of one or more coded bit streams or xe2x80x9celementary streamsxe2x80x9d (xe2x80x9cESxe2x80x9d) such as an encoded video ES, an encoded audio ES, a second language encoded audio ES, a closed caption text ES, etc. Each ES, in particular, each of the audio and video ESs, is separately encoded. The encoded ESs are then combined into a systems layer stream such as a program stream (xe2x80x9cPSxe2x80x9d) or a transport stream (xe2x80x9cTSxe2x80x9d). A PS is comprised of variable length packetized elementary stream or xe2x80x9cPESxe2x80x9d packets containing data for only a single ES. To form a TS, PES packets are divided into a number of payload units and inserted into fixed length (188 byte long) transport packets. The purpose of the PS or TS is to enable extraction of the encoded ESs of a program, separation and separate decoding of each ES and synchronized presentation of the decoded ESs to accurately reproduce the encoded program.
The ESs of each program are encoded in relation to a single encoder system time clock (xe2x80x9cSTCxe2x80x9d). Likewise, the decoding and synchronized presentation of the ESs are ideally synchronized in relation to the same encoder system time clock. Thus, the decoder must be able to recover the original encoder STC to decode each ES and present each decoded ES in a timely and mutually synchronized fashion. To that end, samples of the STC, called clock references (CRs), are inserted selectively into the systems layer streams.
The MPEG standard schedules presentation of audio and video with respect to a 90 KHz clock. In MPEG-2, the 90 KHz STC is obtained from a 27 MHz clock. In MPEG-1, the STC is the 90 KHz clock. An MPEG receiver ideally attempts to recover the exact frequency of the transmitter""s STC, in order to decode and present audio and video as they were, prior to their being encoded and sent by the transmitter. Even if the clock frequency recovery can occur only imperfectly, there is another reason for recovering the transmitter""s STC: with properly encoded MPEG streams, and with a perfectly recovered STC, scheduling mechanisms specified by the MPEG standards keep the buffers, in which the receiver stores encoded audio and video, from backing up.
To facilitate clock recovery, clock references are embedded in MPEG streams as discussed above. The MPEG terminology for a clock reference is either system clock reference (xe2x80x9cSCRxe2x80x9d) or program clock reference (xe2x80x9cPCRxe2x80x9d), depending upon the type of stream (PS or TS) being discussed. Here, we refer simply to a clock reference because the type of clock reference is irrelevant for the purposes of this discussion. A clock reference is a bitfield, typically representing the value of the STC at the moment when the bitfield xe2x80x9cshouldxe2x80x9d enter a certain abstractly-defined buffer, which itself is part of one of the abstractly-defined models put forward in the MPEG systems standards. An MPEG decoder extracts clock references from the MPEG stream and uses the clock references to recover the encoder STC.
The clock recovery problem is complicated by the fact that the decoder clock is not synchronized with the encoder STC; in particular, it does not begin running at the same time. Further, any two independently running clocks will tend to xe2x80x9cdriftxe2x80x9d or run alternately (or consistently) fast or slow relative to each other. Over time, this clock drift can accumulate to levels that will interfere with accurate reproduction of the encoded program.
Prior art MPEG receiver/decoders typically incorporate some means for tracking the relationship between the encoder STC and the corresponding clock in the receiver decoder. Clock tracking and adjustment means usually incorporate a microprocessor having access to the clock reference bitfields as well as the receiver/decoder STC. The microprocessor is provided with program steps for comparing the encoder STC (reflected in the clock reference bitfields) with the receiver/decoder STC, establishing a relationship between the clocks and adjusting the receiver/decoder STC to more closely approximate the frequency of the STC. One such method is discussed in U.S. Pat. No. 6,195,368.
Such clock recovery and adjustment must be accomplished to an acceptable degree of accuracy and within the time constraints of an MPEG stream. The relationship between the encoder STC and the receiver/decoder STC must be updated frequently to maintain the accuracy of the presentation and avoid buffer overflow/underflow problems as discussed above.
The conventional methods for clock recovery typically employ a phase-locked loop (PLL). Upon initial acquisition of a new program, the STC is set to the current value encoded in the CR. The first CR is typically loaded directly into an STC counter and the PLL is operated as a closed loop. At the moment when each CR arrives at the decoder, the value is compared with the current value of the STC at a subtractor which calculates the difference. The difference is a number which has one portion in units of 90 kHz and one portion in units of 27 MHz. The difference is typically designated the E or error term in the loop. A sequence of E terms is inputted to a low pass filter and gain stage. The output of the stage is a control signal which controls the instantaneous frequency of a voltage-controlled oscillator (VCO). The output of the VCO is an oscillator signal with a nominal frequency of 27 MHz. This signal is used as a system clock frequency within the decoder and is input to a counter. The counter generates the current STC values which have both a 27 MHz extension and a 90 kHz base value. The complete STC is a feedback input to the subtractor. The band width of the PLLs typically has an upper bound which is imposed by the bounded maximum interval between successive CRs. If the CRs are received by the decoder with values in timing that are instantaneously correct samples of the constant frequency STC in the encoder, then the error E in turn converges to a constant value after the loop has reached the locked state. Variations in the instantaneous VCO frequency become essentially zero after the loop is locked. Therefore, for a prototypical PLL technique, the adjustment is typically intimately tied to system hardware and essentially implements a sample by sample adjustment in clock recovery.
The present invention represents a different approach to clock recovery from that of the conventional PLL type methods by adjusting the clock recovery by means of a statistical calculation which is consistent with the limitations of the associated decoder and buffer. The present method for clock recovery is based on a statistical model derived from the Central Limit Theorem of statistics and is adapted to the application of clock recovery for MPEG systems.
Briefly stated, a preferred embodiment of the present invention is a method comprising a series of steps to be performed in a decoder to adaptively estimate the ratio P/S of the frequency of an encoder system time clock and the frequency of a decoder system time clock. The steps include performing a series of overlapping trials N which calculate time differentials dP(n), dS(n), respectively, between selected pairs of temporally separated clock references CRs and arrival times STCs. Each trial concludes by calculating an estimated ratio X according to the formula:
X(N)=(xcexa3dP(n))/(xcexa3dS(n)) 
A preferred embodiment of the present invention also includes the step of adjusting the decoder clock in accordance with a damped version of the estimate, thereby xe2x80x9crecoveringxe2x80x9d the encoder STC in the decoder.
An object of the present invention is to provide a new and improved mathematical model essentially divorced from hardware methods for clock recovery that employs a statistical analysis which is less dependent on corrective system hardware to achieve a high degree of accuracy within the time constraints dictated by MPEG transmissions.
Another object of the invention is to provide a new and improved method for clock recovery that employs a statistical model which is adapted to the decoder processing environment.
Another object of the present invention is to provide a new and improved method for clock recovery that adjusts the receiver/decoder clock to compensate for clock drift which is based on a relatively large number of samples and exhibits a significantly reduced influence from noise samples.
These and other objects, features and advantages of the invention will become readily apparent to those skilled in the art upon reading the description of the preferred embodiment, in conjunction with the accompanying drawings.